1. Technical Field of the Invention
The present invention relates to a reading method for a memory device with embedded error-correcting code and to a memory device with embedded error-correcting code.
2. Description of Related Art
As is known, some memory devices, especially of a nonvolatile type and, in particular, NAND Flash memories, intrinsically suffer from a high reading/writing bit error rate (BER). In order to overcome this problem, memory devices which are more error prone are today provided with encoding and decoding modules based upon error-correcting codes (ECCs). In practice, ECCs add a pre-determined number of control bits to the usable information that must be stored and enable automatic correction of a given number of errors that may occur both during the writing step and during the reading step. The correction capacity of a code is calculated on the basis of the number of parity bits and the length of the word of the code.
A type of cyclic ECC used successfully is the BCH (Bose-Chaudhuri-Hocquenghem) code, which is well known and widely exploited in the telecommunications sector.
Many nonvolatile memory devices are, however, also subjected to degradation with use, so that the reading/writing error rate tends to increase over time. For example, in Flash memories, both of a NAND type and of a NOR type, the gate oxide of the cells degrades on account of ageing and electrical stresses. Consequently, the distributions of the threshold voltage values associated with the various programming levels of the cells tend to approach and to overlap one another so that reading errors become inevitable. In practice, as drifts in the threshold-voltage distributions of a cell arise, the result of the reading/writing process becomes increasingly random (more precisely, the sensitivity to random fluctuations increases and hence also the likelihood increases of two successive readings of the same cell in the same configuration yielding different results).
Consequently, over time the average number of reading/writing errors exceeds the correction capacity of the ECC, and the memory device becomes unreliable.
There is a need in the art to overcome the limitations described above, and, in particular, to prolong the useful life of a memory device with ECC.